In an audio amplifier, if a power amplifier of a final stage is configured with a so-called D-class amplifier, a whole is able to be digitized, and is able to be configured as a digital audio amplifier.
FIG. 3 shows one example of such digital audio amplifier. Namely, a digital audio signal S11 is supplied to an over-sampling circuit 12 from an input terminal 11, a sampling frequency thereof is over-sampled to be a digital signal S12 of 8 times, this digital signal S12 is supplied to a ΔΣ modulation circuit 14 through a variable attenuator circuit 13 for volume control, and is re-quantized to be bit-reduced digital signal S14. Further, this digital signal S14 is supplied to a PWM modulation circuit 15, and converted to a PWM signal S15, then this PWM signal S15 is supplied to a power amplifier 16 operating in D-class.
This power amplifier 16 is configured with a switching circuit for power amplifying by switching a power source voltage in accordance with the PWM signal S15, and a low pass filter for outputting a D/A converted and power amplified analog audio signal by smoothing the switching output. Further, by the power amplifier 16, the power amplified audio signal is supplied to a speaker 30 through an output terminal 17.
Further, in a system controller (not illustrated), a volume control signal SVOL is formed, and this signal SVOL is supplied to the variable attenuator circuit 13 as a control signal. Accordingly, when a switch for the volume control is operated, an attenuation level of the variable attenuator circuit 13 is changed, and a volume of a reproduced sound outputted from the speaker 30 is changed.
Further, in this case, the ΔΣ modulation circuit 14 includes a feedback loop for a quantizing error, so that even if a content of the digital signal S12 supplied from the variable attenuator circuit 13 to the ΔΣ modulation circuit 14 is zero, a digital signal S14 having something value is accordingly outputted from the ΔΣ modulation circuit 14, and the digital signal S14 is accordingly outputted from the speaker 30 as a noise sound having a specified frequency.
Consequently, in a dither signal forming circuit 18, a dither signal SDI of a minute level is formed, this dither signal SDI is supplied to the ΔΣ modulation circuit 14, and is superimposed on the digital signal S12 upon re-quantization. Accordingly, even in a case where the content of the digital signal S12 outputted from the variable attenuator circuit 13 is zero, an actual content of the ΔΣ modulation circuit 15 does not become zero, so that it is suppressed to output the noise sound.
Further, in a case when the digital signal S11 to be supplied to the input terminal 11 is switched or disconnected by the switching of the source devices supplying the digital signal S11, the synchronization of the digital signal S11 is temporary disturbed, and this disturbance of synchronization is accordingly outputted from the speaker 30 as the noise sound.
For the sake, the digital signal S11 supplied to the input terminal 11 is supplied to an asynchronous detection circuit 19, and a disturbance of synchronization of the digital signal S11 is detected. Further, this detection signal SDET is supplied to the circuits 12 to 14 as a muting signal, and when the synchronization of the digital signal S11 is disturbed, the contents of the signals S12 and S14 are set to be zero, and as the result, the reproduced sound outputted from the speaker 30 is muted.
The above is one example of an audio amplifier where the power amplifier 17 in the final stage is configured with a D-class amplifier (See Japanese Laid-open Patent Application OP2002-158543, for example).
By the way, in case of the audio amplifier as shown in FIG. 3, when a muting is performed by the detection signal SDET of the asynchronous detection circuit 19, not only the digital signal S12 is muted, but also the dither signal SDI is simultaneously muted in the ΔΣ modulation circuit 14. Accordingly, the dither signal SDI is abruptly cutoff upon muting, and a noise signal is generated by this abrupt cutoff, so that this is outputted from the speaker 30 as a noise sound.
Further, though the dither signal SDI has a minute level, the presence/absence of the dither signal SDI is able to be recognized as a difference in a noise level. Therefore, when the muting is set to be on, the noise level changes because the dither signal SDI is muted, but in a case where the content of the input digital signal S11 is zero (or a minute level), the change in the noise level is recognized, and this causes uncomfortable feeling.
This invention is to solve the above problems.